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EuCAP 2007 The 2nd European Conference on Antennas and Propagation - CALL FOR PAPERS NOW OPEN. 11 – 16 November 2007, The EICC, Edinburgh, UK. This is your chance to take part in the largest European Antennas and Propagation conference in Europe. Following the success of EuCAP 2006 we are pleased to announce EuCAP 2007 to be held in Edinburgh, UK. EuCAP has become a regular keystone event on Antennas and Propagation, with a large participation of the world community. EuCAP is supported by the top level Associations in Antennas & Propagation and will provide the ideal place for the exchange of scientific and technical information and to foster collaboration and cooperation in the Antenna & Propagation domain both at European and global levels. Interested? To find out how to submit a paper, to view the technical scope or for more information go to www.eucap2007.org.

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The much-delayed rollout of broadband-over-powerline technology has received a boost from the IEEE, which announced that a working group has developed requirements for a baseline BPL standard.

Don't expect the same old stuff at the 2007 Embedded Systems Conference, scheduled for April 1-5 at the McEnery Convention Center in San Jose, Calif. This year's show will be virtually bursting at the seams, with many vendors setting up shop outside the main exhibit hall. Vendors seem to be cautiously optimistic, now that issues like the European Union's Restrictions on Hazardous Substances (RoHS) are being addressed and the latest standards-based technologies like Serial ATA (SATA) and PCI Express are commonplace. In fact, this optimism has triggered the return of numerous exhibitors and attracted a host of new vendors.

Cadence announced immediate availability of the 65-nanometer Common Power Format (CPF) enabled reference flow targeting the Common Platform technology. This reference flow is the next step in the ongoing collaboration between Cadence and the Common Platform coalition comprised of IBM, Chartered Semiconductor Manufacturing and Samsung. Cadence worked closely with the Common Platform technology partners to develop this 65-nanometer flow. It is based on the Cadence digital IC design platform including Encounter Timing System and CPF to accelerate time to market for low-power system-on-chip (SoC) designs.

Samsung has developed the first all-DRAM stacked memory package using 'through silicon via' (TSV) technology, which will soon result in memory packages that are faster, smaller and consume less power. The new wafer-level-processed stacked package (WSP) consists of four 512 megabit (Mb) DDR2 (second generation, double data rate) DRAM (dynamic random access memory) chips that offer a combined 2 gigabits (Gb) of high density memory. Using the TSV-processed 2Gb DRAMs, Samsung can create a 4 GB (gigabyte) DIMM (dual in-line memory module) based on advanced WSP technology for the first time. Samsung's proprietary WSP technology not only reduces the overall package size, but also permits the chips to operate faster and use less power.

Linear Technology reported revenue for the fiscal third quarter ended April 1 of $255 million, a bit above the Street consensus of $253.98 million; EPS of 32 cents a share was in line with expectations. Linear also said that “inventory in the marketplace appears to be more balanced than in previous quarters,” but that “visibility continues to be low and customers remain guarded in their forecasting and inventory management.”